In the field of power semiconductor technology, it is endeavored to provide semiconductor devices with protection mechanisms in order that destruction of the semiconductor devices can be prevented even under extreme conditions.
Such extreme conditions may occur, inter alia, during the commutation of power semiconductor diodes: during the commutation process, high electric fields are present for example at the n−n junction of a pn−n semiconductor diode, which leads to an avalanchelike generation of charge carriers at the n−n junction. At the same point in time, high electric field strengths occur at the pn− junction of the pn−n semiconductor diode and lead to an avalanchelike generation of charge carriers at the pn junction. The abrupt, avalanchelike generation of charge carriers (so-called “avalanche effect”) means that a high electric field required for the blocking capability of the semiconductor diode can no longer be maintained in the n−-doped central region of the semiconductor diode. The semiconductor diode thus loses its blocking capability and is destroyed unless external measures for limiting current and power have been implemented.
In order to avoid destruction of the semiconductor diode, the commutation process of the diode has hitherto had to be effected sufficiently slowly. When using such semiconductor diodes within IGBT semiconductor modules, however, it has thus been necessary to accept an increase in the switch-on losses of the IGBT.
A further possibility for preventing the semiconductor diode from being destroyed consists in increasing the chip thickness of the semiconductor diode or reducing the quantity of flooding charge at the anode and simultaneously increasing the flooding charge at the cathode. However, such measures entail increased on-state or switching losses.
In the case of IGBT (Insulated Gate Bipolar Transistor) semiconductor devices (in particular in the case of field stop IGBTs and PT (“punch through”) IGBTs), extreme conditions occur primarily when high currents are switched off and in the event of short circuits. When high currents are switched off, care must be taken to ensure that corresponding current decreases within the IGBT semiconductor device do not turn out to be excessively steep, which is the case particularly when, in the case of a required reverse voltage, no or too little flooding charge is present in the rear side part of the IGBT semiconductor device and the load current consequently undergoes chopping. In the event of short circuits, on account of the strong electron flow through the channel induced in the IGBT semiconductor device, the state may arise in which the highest electric field strength within the IGBT semiconductor device does not occur at the pn junctions near the front side, but rather at the rear side nn+ junction toward the field stop layer or buffer layer. This may in turn have the effect that an avalanchelike generation of charge carriers is effected at the nn+ junction and leads to the reduction of an electric field within the IGBT semiconductor device and thus to a loss of the blocking capability of the device. In both cases, the IGBT semiconductor device may be destroyed.
In the case of NPT (“non-punch through”) IGBTs, the problems described above cannot occur, in principle, since a sufficiently thick neutral zone remains or no field stop layer is present in these semiconductor devices. Since the electric field within the NPT IGBT, on account of the increased thickness of the semiconductor device, practically never forms in the entire semiconductor volume, a sufficient quantity of charge carriers for current transport is always available during a current turn-off process, with the result that the load current cannot undergo chopping. In the event of short circuits, a higher electron current density leads to a shallower gradient of the electric field and thus to the space charge zone approaching the rear side emitter (for example p-doped), which, on account of this, injects more holes into the semiconductor device. This additional positive charge in turn leads to a steepening of the electric field and thus to the stabilization thereof. The blocking capability of the IGBT can thus be maintained.
What is disadvantageous about NPT IGBTs, however, is their increased chip thickness compared with field stop or PT IGBTs, which correspondingly increases switching and on-state losses. It has therefore been attempted to interrupt the field stop layer or configure it in insular fashion and/or to lightly dope it. This again has the disadvantage that it is necessary to find a compromise between the static blocking capability of the semiconductor device and the softness or short circuit strength. Although it is possible to improve the softness or short circuit strength of the semiconductor device by increasing the doping of the rear side emitter, this leads to a high degree of charge carrier flooding even under normal conditions, which is undesirable since this results in increased switching losses.
There is a need, therefore, for an IGBT which are configured as compactly as possible in their dimensions and at the same time preclude destruction of the semiconductor devices under extreme conditions.